For the past several decades feature scaling has been a driving force in the production of integrated circuits in the semiconductor industry. Scaling features to smaller and smaller size can enable the production of devices that include a larger number of functional units within the limited real estate of a semiconductor chip. For example, shrinking component size may allow for an increased number of memory cells to be placed within a given area of a semiconductor chip, leading to the production of memory devices with increased storage capacity. However, shrinking feature size can also lead to challenges that in some instances can be difficult to address.
With the foregoing in mind, memory devices that include magnetic tunnel junctions (MTJs) are gaining increased attention due to their potential for replacing conventional memory. Such memory devices may include an array of memory cells that include one or more MTJs that have multiple operational states, which may be leveraged to store information. Such MTJs generally include a plurality of layers (e.g., a fixed magnetic layer, a dielectric (tunneling) layer, and a free magnetic layer), which collectively determine the magnetic behavior of the device.
Spin transfer torque memory (STTM) is one type memory that is becoming of increasing interest in the semiconductor industry, due to the relatively small size of its elements, its potential for low power operation, and its potential for direct integration with other elements on a semiconductor chip, such as transistors. Generally, the operation of STTM devices is predicated on the phenomenon of spin transfer torque. When a current is passed through a magnetization layer of such devices, called the fixed magnetic layer, the current will come out spin polarized. With the passing of each electron in the current through the fixed magnetic layer, the resulting spin (angular momentum) may be transferred to the magnetization of another magnetic layer in the device, called the free magnetic layer, resulting in a small change in the magnetization of the free magnetic layer. In effect, this is a torque which causes precession of the magnetization of the free magnetic layer. Likewise, a torque may be applied to an associated fixed magnetic layer, e.g., due to the reflection of electrons.
Ultimately when an applied current (e.g., a pulse) exceeds a threshold value (which may be defined at least in part by damping caused by the magnetic material and its environment) the orientation of the magnetization of the free magnetic layer may be switched between a state that is parallel with the orientation of the magnetization of the fixed magnetic layer, and a state that is antiparallel with the orientation of the magnetization of the fixed magnetic layer. The orientation of the magnetization of the fixed magnetic layer may remain unchanged by the applied current, e.g., because the applied current is below a threshold for the fixed magnetic layer and/or because the orientation of the magnetization of the fixed magnetic layer may be “pinned” by one or more adjacent layers, such as a synthetic antiferromagnetic layer. Spin transfer torque can therefore be used to flip the active elements in a random access memory, such as an STTM device.
The electrical resistance of an MTJ such as an STTM element may be impacted by the orientation of the magnetization of the free magnetic layer relative to the orientation of the magnetization of the fixed magnetic layer. For example the electrical resistance of some MTJ elements such as STTM elements may be relatively low when the orientation of magnetization of the free magnetic layer is parallel to the orientation of magnetization of the fixed magnetic layer. In contrast, the electrical resistance of such devices may be relatively high when the orientation of the magnetization of the free magnetic layer is antiparallel with the orientation of the magnetization of the fixed magnetic layer. MTJs such as STTM elements may therefore exhibit a tunneling magnetoresistance ratio (TMR) that is defined at least in part by the difference between the high and low resistance states of the MTJ.
While previously developed STTM and other MTJ based memory devices have proven useful, challenges have arisen as such devices have been scaled to smaller and smaller dimensions. For example it has been observed that as the size of MTJ elements in a memory device decreases, the TMR of such elements tends to decrease as well, potentially leading to performance problems. For example, as the TMR of such devices is reduced, the magnitude of the difference of between a sensed current during a read operation when the MTJ is in its low resistance and its high resistance state may also be reduced, potentially making such elements unsuitable for use in certain memory applications. In that regard various efforts have been made to mitigate the reduction in TMR that may result from the scaling of magnetic tunnel junctions. Pursuant to such efforts, it has been determined reduction in the TMR of an MTJ may be mitigated by optimizing the free, fixed, and/or dielectric layer(s) thereof. Although effective to some extent, such optimizations are inherently limited by various factors. Other options for improving the TMR of MTJ based memory elements/devices are therefore of interest.